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DFT Engineer
HCL TechBee
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Section · 01
About this role
Position: DFT Engineer,
Location: Kochi
Experience: 15+ Years
Be part of HCLTech's Semiconductor team and drive advanced Design-for-Test (DFT) solutions for complex SoC and ASIC designs. We're looking for experienced professionals with deep expertise in DFT architecture, scan implementation, ATPG, compression techniques, and silicon bring-up across leading semiconductor programs.
Key Responsibilities:
- Lead end-to-end DFT implementation for complex SoCs, including Scan, MBIST, LBIST, and ATPG.
- Define DFT architecture and drive test coverage optimization for high-quality silicon.
- Expertise in Synopsys/Tessent DFT tools and advanced semiconductor design methodologies.
- Collaborate with cross-functional teams to ensure successful DFT integration and silicon bring-up.
- Provide technical leadership and mentoring while driving DFT sign-off across projects.
Regards,
Karthik Kumar
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