BENGALURU · FULLTIME
Design Verification Engineer
Edgeq Inc
Bengaluru · onsite · Posted 1d ago
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Undisclosed3–8 yrsfulltimeBengaluru
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Section · 01
About this role
Job Description
EdgeQ is looking for talented Design Verification Engineers across experience levels to join our verification team working on complex semiconductor designs for 5G/6G, edge computing, and networking applications. We are looking for engineers who are passionate about building robust verification environments and ensuring high-quality silicon through comprehensive IP, SoC, and post-silicon verification. The role covers verification at IP, subsystem, SoC, and post-silicon levels.
Responsibilities
- Develop and execute verification strategies for digital IPs, subsystems, and complete SoCs.
- Develop testbenches, test scenarios, sequences, checkers, scoreboards, assertions, and functional coverage.
- Work with System Verilog and UVM to build scalable and reusable verification environments.
- Verify complex data paths, control logic, memories, interfaces, and system-level functionality.
- Perform block, IP, subsystem, and SoC-level verification including integration and system-level scenarios.
- Debug simulation, formal, emulation, FPGA, and silicon issues and work closely with design and architecture teams.
- Drive functional and code coverage closure and identify verification gaps.
- Develop automation and verification infrastructure to improve regression, debug, and overall verification efficiency.
- Support pre-silicon verification, silicon bring-up, post-silicon validation, and debug activities.
Required Skills
- Strong fundamentals in digital design and computer architecture.
- Hands-on experience with Verilog/System Verilog and verification methodologies.
- Experience with System Verilog/UVM-based verification environments.
- Good understanding of constrained-random verification, assertions, functional coverage, and regression.
- Strong debugging and problem-solving skills.
- Experience with ASIC/SoC verification flows.
- Verify low-power designs and power-management features using UPF, including power domains, isolation, retention, power states, and power sequencing.
Good to Have
Experience with any of the following - 5G/6G, RISC-V, O-RAN/eCPRI, JESD204, Ethernet, PCIe/CXL, UCIe, SerDes, Network-on-Chip (NoC), DSP/data path verification, low-power verification, formal verification, emulation/FPGA validation, or post-silicon debug.
Education
B.Tech/M.Tech/M.S. in Electrical/Electronics Engineering, VLSI, Computer Engineering, or a related field.
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
Sourced from naukri
Section · 02
Skills
Automationformal verification5Gcomputer architecturecomputer engineeringcode coverageipsdigital designNOCedge computingASICPCIEDesign VerificationElectronics EngineeringComputer NetworksdebuggingDebugArchitecture