BENGALURU · FULLTIME
Design Verification Engineer
Scaledge
Bengaluru · onsite · Posted 31d ago
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Section · 01
About this role
4+Years Strong experience in System Verilog and UVM methodology
Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)
Good understanding of verification concepts, coverage, assertions, and debugging
Experience with simulation tools (VCS, Questa, Xcelium, etc.)
Strong analytical & problem-solving skills
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About Scaledge
Scaledge
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212
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2011
15 years old
San Jose, California
CU
₹10.9L PA avg
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