Design Verification Engineer - SystemVerilog/UVM
Rangam Infotech · Bengaluru · onsite · Posted 30d ago
Not disclosed8–12 yrsfulltimeSourced from
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About this role
Design Verification Engineer - SystemVerilog/UVM
Sourced from hirist
Skills
verificationUVMSystem VerilogRTL DesignPython
About Rangam Infotech
Rangam Infotech
Recruitment
300
employees
2005
21 years old
Vadodara, Gujarat
India
₹5.5L PA avg
Avg at Rangam Infotech
About
IT consulting firm providing staffing and product development solutions, focusing on efficient delivery and customized services for diverse client needs in APAC.
Industries
RecruitmentIT Services & Consulting
Employee ratings
10 reviews
3.7/ 5
Culture
3.6
Career growth
3.0
Work-life
3.4
Employees rate it well for
Overall Company37Work-Life Balance36
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