Design Verification Engineer (DO-254)

• Verify and validate FPGA/CPLD/ASIC designs using DO-254 standards.


• Develop and implement verification environments using Verilog/VHDL and SystemVerilog.


• Perform thorough analysis of design functionality to ensure compliance with requirements.


• Collaborate with cross-functional teams to identify and resolve design issues.


• Utilize tools like Questa/VCS for verifying complex designs.


• Maintain detailed documentation of verification plans and results.

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