NOIDA · FULLTIME
Design Engineer - Verification
Sourceright Technologies
Noida · onsite · Posted 28d ago
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Undisclosed8–12 yrsfulltimeNoida
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Section · 01
About this role
Position: Design Engineer - Verification (BB812FT RM 4421)
Job Summary
The Verification role will involve many aspects of Functional, Performance verification using most effective methodologies in context of Module/Subsystem/SoC /System Level. A strong ability to map requirements into a traceable verification plan is important. The ideal candidate will partner with local and global SoC and IP developers to drive best practices with a target of ongoing productivity improvement. A zero-defect mindset is a key enabler. Responsibilities encompass the development of verification test bench, development of verification components, test case development for simulation, formal verification and emulation, debugging failures and creating simulation cases for various studies
The Verification role will involve many aspects of Functional, Performance verification using most effective methodologies in context of Module/Subsystem/SoC /System Level. A strong ability to map requirements into a traceable verification plan is important. The ideal candidate will partner with local and global SoC and IP developers to drive best practices with a target of ongoing productivity improvement. A zero-defect mindset is a key enabler. Responsibilities encompass the development of verification test bench, development of verification components, test case development for simulation, formal verification and emulation, debugging failures and creating simulation cases for various studies
- Expectations include:
- Verification planning;
- Verification test bench development and implementation;
- Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs;
- Development of direct and constrained-random stimulus;
- Understands and analyzes RTL code, functional, assertion coverage results;
- Understands Develop functional coverage;
- Understands and develops system Verilog assertions;
- Understands and implements formal verification methods;
- Strong skills in debug, failure re-creation and root cause analysis
- Applicant should have efficient debugging and logic skills.
Job Qualifications
- BTech/MTech with 8-12 years experience in SOC/IP/Subsystem verification of multimillion Gate complex Design with multiple clocks/power domains. Experience in below areas with strong hands on knowledge in below areas is needed
- C and UVM/SV based Test environment,
- HDLs (Verilog/VHDL), simulators (Synopsys/Cadence/Mentor) is a MUST
- Understanding of the design/architecture and ability to debug RTL/Gate netlist is MUST
- Coverage driven Verification for addressing Functional, Performance requirement of the SoC, regression management
- Microcontroller architecture, ARM Cores, Interconnect(NIC, FlexNoC), Cache Coherency,
- Bus Protocols like AHB/AMBA,AXI, ACE
Following skills will have additional value:
- Memory controllers (Flash, SRAM,DDR3/4/LPDDR)
- Protocols like PCIe, MIPI, GPU (Graphics processing), VPU (Video Processing), Ethernet, USB, Image
- Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization
- Low Power intent verification using CPF, UPF
- Exposure to pre silicon validation/emulation (Palladium, Zebu)/FPGA Prototyping would be a plus
Job Category: Embedded HW_SW
Job Type: Full Time
Job Location: Noida
Experience: 8-12 Years
Notice period: 0-30 days
Disclaimer: This job posting and location has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
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Section · 02
Skills
PrototypingSOCformal verificationCadenceregressionPCIECachedesign engineerRoot Cause Analysissilicon validationLpddrProductivity ImprovementsynopsysambaEmbedded SystemsdebuggingDebugMIPIAceGraphicsArchitecture