CAD RTL/DV Infrastructure Engineer, Staff

Company Qualcomm India Private Limited

Job Area Engineering Group, Engineering Group > Hardware Engineering

General Summary Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Description We are seeking a highly motivated

CAD RTL/DV Infrastructure Engineer to join our Qualcomm Oryon CPU team. In this role, you will work closely with RTL, DV, and DFT teams to maintain and enhance our CI/CD infrastructure, driving continuous improvement in verification flows. You will collaborate with multiple teams across geographies to ensure robust and efficient design and verification processes.

Key Responsibilities

• Maintain and enhance CI/CD infrastructure for CPU design and verification workflows.
• Partner with RTL, DV, and DFT teams to optimize verification flows and methodologies.
• Drive automation and continuous improvement initiatives across the CPU team.
• Collaborate with global teams to ensure alignment and scalability of infrastructure.
• Work with EDA tool vendors to drive bug fixes and resolve tool-related issues.
• Troubleshoot and resolve issues in design and verification environments.

Required Skills & Experience

• Strong experience with Git, GitHub, Python, and Shell scripting.
• Hands-on experience with LSF (Load Sharing Facility) for job scheduling.
• Familiarity with CI/CD tools such as Jenkins and workflow orchestration tools like Airflow.
• Solid understanding of CI/CD principles and infrastructure management.
• Excellent problem-solving and communication skills for cross-team collaboration.

Preferred Qualifications

• Experience in RTL design using Verilog/SystemVerilog.
• Understanding of CPU microarchitecture concepts.
• Familiarity with verification methodologies and flows.
• Nice to have: + Experience with Perforce for source control. + Ability to create and maintain Splunk dashboards for monitoring and analytics.

Tools & Technologies Git, GitHub, Jenkins, Airflow, LSF, Python, Shell scripting, Perforce (optional), Splunk (optional).

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