ASIC Technical Program Manager (TPM)

Role & responsibilities

What You Will Do

• Own the program plan, milestones and critical path from architecture freeze through tape-out and silicon bring-up.
• Drive cross-functional execution across RTL, DV, DFT, PD, SW/FW and validation teams.
• Run gated reviews (spec, RTL freeze, DFT, signoff, tape-out) and enforce exit criteria.
• Manage scope, risks, dependencies and change control with customers, foundry and OSAT partners.
• Forecast effort and capacity; align staffing, EDA tools and IP with the plan.
• Report schedule, quality and risk status to customer and leadership; escalate early.

What You Bring

• 15+ years in semiconductors, with 8+ years leading ASIC/SoC programs through at least two tape-outs.
• Strong command of the full ASIC flow: architecture, RTL, DV, DFT, PD, signoff, post-silicon.
• Hands-on with tape-out gating, signoff criteria and the foundry/OSAT interface (masks, packaging, test).
• Proven effort estimation, budget tracking and risk management on fixed-price or T&M turnkey engagements.
• Confident, customer-facing communicator who can hold senior technical and business conversations.
• Proficiency with Jira, MS Project or equivalent planning tools.

Good to Have

• PMP / PgMP certification
• Experience with advanced nodes or multi-die / chiplet programs
• Exposure to post-silicon validation and production ramp

Preferred candidate profile

Perks and benefits