{"@context":"https://schema.org","@type":"JobPosting","title":"ASIC RTL Design Engineer - DDR","description":"

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering.
Expertise in the definition of architecture and microarchitecture features for the block
Expertise in developing the logic design
Expertise in working on DDR memory controllers
Expertise in CDC / RDC
Expertise in Lint
Expertise in register transfer level (RTL) coding
Expertise in simulation of SoC design and integration of IP blocks and subsystems into a full chip SoC or discrete component design.
Expertise in performing quality checks for various logic design aspects ranging from RTL to timing/power convergence.
Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Follows secure development practices to address the security threat model and security objects within the design.
Works with IP providers to integrate and validate IPs at the SoC level.
Drives quality assurance compliance for smooth IP SoC handoff.

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