ASIC-FPGA Verification Engineer

Interested candidates: Share your updated resume at [email removed]

We're Hiring: Associate ASIC-FPGA Verification Engineer | Bengaluru

We are looking for an experienced ASIC-FPGA Verification Engineer for a premium client in the aerospace and defense engineering domain.

Location: Bengaluru, Karnataka
Experience: 68 Years
Qualification: Bachelor's or Master's degree in Electronics, Electrical Engineering, Microelectronics, VLSI/CAD, or Embedded Systems

Mandatory Skills:

• Strong experience in Digital Functional Verification for ASIC and FPGA at IP, Subsystem, and System levels.
• Hands-on experience with PCIe Gen4/Gen5/Gen6 and Ethernet protocols.
• Strong expertise in SystemVerilog and UVM methodology.
• Experience developing reusable UVM testbench components, including drivers, monitors, scoreboards, checkers, coverage models, and reference models.
• Experience in verification activities for at least one ASIC/FPGA product tape-out.
• Knowledge of PCIe PHY, Link, and Transaction layers, along with Ethernet MAC layer verification.

Key Responsibilities:

• Develop reusable verification components and UVM testbenches.
• Build self-checking scoreboards, reference models, assertions, and functional coverage.
• Track verification metrics and ensure compliance with technical requirements.
• Support verification quality across multiple ASIC/FPGA development milestones.

Good to Have:

• SystemVerilog Assertions (SVA) and formal verification.
• Code and functional coverage sign-off.
• Gate-level and power-aware simulation debugging.
• Python, Perl, Make, and shell scripting.
• Git, SVN, or CVS version control.
• Avionics protocols and DO-254 experience.

Interested candidates: Share your updated resume at [email removed]