ASIC Engineer

Position: ASIC Engineer (BB46FT RM 4389)

Skill Requirements

• 4-6+ years of experience in AMS Co-verification / Circuit-Level Verification
• Strong understanding of analog circuit verification with basic UVM knowledge (primarily for debug)
• Experience developing analog test cases based on existing sample test cases
• Hands-on experience with SPICE and Spectre netlists
• Verification of high-speed bi-directional and core analog components at subsystem/top level
• Ability to select and configure analog components based on target test case requirements
• Good transistor-level circuit knowledge
• Experience comparing behavioral models with schematic implementations
• Verilog-AMS experience is preferred but not mandatory
• Ability to create Verilog behavioral models for analog components is an added advantage

Tools

• Cadence Spectre
• Cadence Virtuoso
• Cadence Xcelium