Analog Design Automation

Role & responsibilities

• Understand design, simulate, and layout challenges in RF/analog blocks including PAs, LNAs, switches, and filter networks in Cadence Virtuoso across multiple process technologies and be able to encode that knowledge into an intelligent automation flow
• Understand how design, simulation and physical verification data is generated across distributed platforms and develop strategies for engineering that data for a machine learning and/or agentic AI platform
• Partner with PDK, layout, and verification teams to align design practices with process capabilities, DRM limits, and foundry release schedules
• Develop connections between design steps and tools in the analog, RF and mixed-signal domains using agentic AI framework with the goal of developing a self-evolving design flow

Preferred candidate profile

• B.S. or higher in Electrical Engineering, Computer Engineering, or Computer Science
• 3+ years of professional experience in analog/RF IC design and verification or EDA engineering in an analog or RF environment
• Strong automation skills for analog/RF flows (Python, SKILL, Tcl, or equivalent)
• Demonstrated ability of turning informal design and verification practice into structured workflows
• Strong debugging and analytical skills
• Excellent communications skills with the ability to work and thrive in a team environment