Analog and Mixed Signal Design Engineer

Own SoC integration of analog/mixed-signal IP. Design and simulate ADC/DAC, PLL, bandgap and SerDes blocks across PVT, Monte Carlo and post-layout. Guide layout, support top-level verification, silicon bring-up and customer reviews.

Required Candidate profile

B.E/B.Tech/M.Tech in Electronics/VLSI with 5-10 yrs in analog/mixed-signal design. Hands-on SoC integration, ADC/DAC, PLL, bandgap, SerDes. Cadence Virtuoso/Spectre, Calibre. Tape-out a plus.